Recall the Readers-Writers problem where, as usual, any number of readers can examine a file but only one writer at a time can update the file.
Consider the following code as a potential solution.
For each reader process:
while (1) {
1. wait(sem_readcount);
2. readcount++;
3. signal(sem_readcount);
4. if (readcount==1) wait(sem_wrt);
/* reader reads from the file */
5. wait(sem_readcount);
6. readcount--;
7. signal(sem_readcount);
8. if (readcount==0) signal(sem_wrt);
}
For each writer process:
while (1) {
9. wait(sem_wrt);
/* writer writes to file */
10. signal(sem_wrt);
}
Assume that each semaphore is initially available and that readcount is zero.
a) Is the solution correct? YES/NO
In each of the following, your answer should be either
i) HAS NO EFFECT
ii) IS NEEDED FOR A CORRECT SOLUTION
iii) MAKES FOR AN INCORRECT SOLUTION
Include a brief explanation. Note that each question is independent, that is, it assumes the original code above.
b) What is the effect of swapping lines 1 and 2?
c) What is the effect of swapping lines 3 and 4?
d) What is the effect of swapping lines 7 and 8?
Consider a computer system with virtual memory and recall that the long-term scheduler controls the "degree of multiprogramming" (the number of processes in memory).
a) Define thrashing and its relationship to the degree of multiprogramming.
b) Draw a typical graph of CPU utilization as a function of the degree of multiprogramming and describe why it has this shape.
Now, the system is measured to determine the utilization of the CPU and the utilization of the disk used for swapping pages.
For each of the following possible measurements, state (YES/NO) whether the CPU utilization would be expected to increase if the degree of multiprogramming was increased. Provide a brief explanation in each case. Hint: your graph in part b) can help provide your answers here.
c) CPU utilization 13%; disk utilization 97%
d) CPU utilization 13%; disk utilization 3%
e) CPU utilization 87%; disk utilization 3%
f) CPU utilization 87%; disk utilization 97%
Design a fully simplified combinational circuit that has 2 control lines (C1 and C2) and 2 input lines (X1 and X2). The 2 outputs are F1 and F2. The circuit behavior is described by the table shown below:
C1 C2 F1 F2
------- -------
0 0 1 1
0 1 X1 X2
1 0 0 0
1 1 X2' X1' (these are complements)
Draw the circuit diagram.
a) Draw a block diagram for a simple accumulator-based microprocessor. Assume that the microprocessor has the following registers:
AC |
(accumulator) |
TMP |
(temporary register) |
PC |
(program counter) |
AR |
(address register) |
MDR |
(memory data register) |
IR |
(instruction register) |
In your diagram you should show and label all the necessary components of the microprocessor and the necessary connections between the different units. The source inputs of the ALU are AC and TMP, while AC is also the ALU destination.
b) Describe the sequence of events that takes place when the microprocessor executes the following instructions:
(i) LDA $2000 (Load AC with the contents of location 2000 in memory.)
(ii) ADA $2000 (Add the contents of memory location 2000 to AC.)